FPGA-based experimental board for error control codes

Ahmed Abdulkadhim Hamad, Haider Saheb Al-Mumen, Mohammed Taih Gatte

Abstract


This paper proposed an experimental device that emulates and facilitates teaching the theoretical concepts of error-control coding (ECC) techniques. Two prototypes laboratory boards were designed and implemented. The first board simulates the transmitter side of a typical digital communication system. It mainly contains a data source, (7,4) Hamming encoder, cyclic redundancy check encoder (CRC), and Gaussian noise generator. The second board has two types of Hamming decoders, a syndrome decoder, and a maximum likelihood (ML) decoder that accepts the received soft signals at the channel output. Each board has several control switches so that the trainee can change the code variables, noise power, user ID, in addition to display tools such as light-emitting diodes (LEDs), and test points for the oscilloscope that help the user to observe the results. Moreover, results and setting variables can also be displayed on a PC’s screen connected through a USB port and organic light emitting diodes (OLED) display that is attached to the receiver board. The pipelining architecture of the field programmable gate array (FPGA) device was exploited in this proposed system to reduce the processing delay and hence increase the data throughput. Furthermore, we proved that both theoretical and experimental tests are identical.

Keywords


Cyclic redundancy check code; Experimental board; Field programmable gate array; Hamming code; Vivado high-level synthesis

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DOI: https://doi.org/10.11591/eei.v11i3.3778

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