Optical network on chip: design of wavelength routed optical ring architecture
Thandapani Kavitha, Gopalswamy Maheswaran, Joly Maheswaran, Chandramohan K. Pappa
Abstract
Network on chip (NoC) technology has now achieved a mature stage of development as a result of their use as a key component in many successful commercial devices. As multiprocessors continue to scale, these ship based electronic networks are more challenging to meet their power budget communication requirements. Innovative technology is emerging with the aim of offering shorter latencies and greater bandwidth with lower power consumption. Ring topology provides superior results among the all wavelength routed topologies in the chip optical network. In this paper, we proposed an optical ring network-on-chip (ORNoC) architecture which is contention free. Communication matrix is used to assign a single waveguide/wavelength pair to implement simultaneous communications. The design constraints for the proposed architecture will be wavelength reused on a single waveguide for multiple communications. We imply automatic wavelength/waveguide assignment for effective design and will prove that the proposed architecture can connect more number of nodes and less wavelengths per waveguide.
Keywords
Delay; Optical NoC; Optical router; Power analysis; Throughput; Wavelength allocation
DOI:
https://doi.org/10.11591/eei.v12i1.4294
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Bulletin of Electrical Engineering and Informatics (BEEI) ISSN: 2089-3191, e-ISSN: 2302-9285 This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU) .